1、功能说明
    1、GTIMA2 周期门控GTIMA3 GTIMA4

2、使用环境
    软件开发环境：KEIL MDK-ARM V5.34
    软件开发环境：IAR EWARM 8.50.1

    芯片支持：
        N32H730  
        N32H735   
        N32H735EC
        N32H760
        N32H762
        N32H765
        N32H765EC
        N32H785
        N32H785EC
        N32H787

3、使用说明
    系统配置；
        1、时钟源：HSI+PLL
        2、系统时钟频率：
            M7核: 600MHz
        3、端口配置：
			PA6选择为GTIMA2的CH1输出
			PB6选择为GTIMA3的CH1输出
			PA0选择为GTIMA4的CH1输出
        4、TIM：
			GTIMA2 周期触发门控GTIMA3/GTIMA4的CH1,即GTIMA3为10倍周期GTIMA2，即GTIMA4为5倍周期GTIMA2
    使用方法：
        1、编译后打开调试模式，用示波器或者逻辑分析仪观察GTIMA2_CH1、GTIMA3_CH1、GTIMA4_CH1的波形
        2、GTIMA4周期5倍于GTIMA2，GTIMA3周期10倍于GTIMA2

4、注意事项
    主定时器的时钟需要大于等于从定时器
    
1. Function description
     1. GTIMA2 cycle gated GTIMA3/GTIMA4

2. Development environment
    Software development environment: KEIL MDK-ARM V5.34
    Software development environment: IAR EWARM 8.50.1

    Supported chips:
        N32H730  
        N32H735   
        N32H735EC
        N32H760
        N32H762
        N32H765
        N32H765EC
        N32H785
        N32H785EC
        N32H787

3. How to use
   System Configuration:
        1. Clock source: HSI+PLL
        2. System Clock frequency: 
            M7 Core:     600MHz
        3. Port configuration:
			PA6 is selected as CH1 output of GTIMA2
			PB6 is selected as the CH1 output of GTIMA3
			PA0 is selected as the CH1 output of GTIMA4
        4. TIM:
			GTIMA2 cycle triggers CH1 of gating GTIMA3/GTIMA4, that is, GTIMA3 is 10 times period GTIMA2, that is, GTIMA4 is 5 times period GTIMA2
    Instructions:
         1. After compiling, turn on the debug mode and use an oscilloscope or logic analyzer to observe the waveforms of GTIMA2_CH1, GTIMA3_CH1, and GTIMA4_CH1
         2. The cycle of GTIMA4 is 5 times that of GTIMA2, and the cycle of GTIMA3 is 10 times that of GTIMA2.
4. Attention
    The clock of the master timer needs to be greater than or equal to that of the slave timer.

